Product Overview
The Synaptics Astra SR200 Series of AI-native MCUs delivers high-performance, low-power multimodal compute for wearables, connected cameras, and industrial vision and voice systems. Powered by the Synaptics Torq™ AI engine with Google Research’s Coral NPU™, the series provides 400 GOPS of AI inference alongside Arm® Cortex®-M85 and Cortex®-M52 cores. Its integrated vision, display, and audio pipelines support applications such as camera processing, rich user interfaces, wake-word detection, and voice processing. A multi-die system-in-package design combines compute, power management, and high-capacity memory to improve design efficiency and reduce system power and cost. With advanced security, broad connectivity, Zephyr RTOS support, and an open-source NPU compiler, SR200 MCUs enable a new class of Edge and physical AI devices.
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SR200 Series Block Diagram
Features
Compute & AI
- Arm® Cortex®-M85 at 800 MHz and Cortex®-M52 at
200 MHz with Arm Helium™ SIMD extensions for DSP/ML workloads - Torq AI engine with Coral NPU, supporting INT8, INT16, BFLOAT16
data types - Cadence Tensilica HiFi 5 DSP at 400 MHz
Memory & Storage
- Up to 8 MB of shared SRAM Hundreds of MB of custom DRAM with secure access
- Over 700 KB of combined local memories across processors and DSP
- Octal SPI for external NOR/PSRAM devices with XIP
- eMMC 5.1 and SD 3.0 interfaces
Vision & Imaging
- 2x MIPI CSI-2 interfaces with 2 lanes each, up to 2.5 Gbp/s per lane
- Dual ISPs for AI vision and human vision
- H.264/JPEG encoding
Graphics & Display
- 2.5D GPU with integrated display pipeline
- 2x MIPI-DSI interfaces with two data lanes each, 2.5 Gb/s per lane
- Single 1920×1080 @60 Hz or dual 1920×1080 @30 Hz displays
- H.264/JPEG hardware decoding
Audio
- 2x I2S/TDM + 3x PDM interfaces for up to six digital mics
- Always-on domain support
- Dedicated hardware voice activity detection and mute pin
Connectivity & I/O
- 6x UART
- 6x I2C, 2x I3C controllers
- 6x SPI, 2x QSPI interfaces
- 2x SDIO 3.0 controllers
- 140+ GPIOs
- RISC-V-based I/O engine for custom peripherals
- Dual-role USB 2.0
- 2x CAN-FD 2.0A/B controllers
- 1x GbE MAC with RMII, RGMII with TSN, IEEE 802.3az
Security
- PSA Level 3/CC EAL4 architecture
- Secure debug
- Crypto acceleration
Power Management
- Integrated mixed-signal PMIC, DVFS
- High performance, low power, ultra-low power, always-on independent power domains


